Programmable resistive memories, such as phase change random access memory (PC-RAM), conductive bridge random access memory (CB-RAM), resistive random access memory (R-RAM), nano-random access memory (NRAM), or oxide-resistive memory (OX-RAM), are considered as promising candidates for future non-volatile memories. They may be integrated with planar bulk metal oxide semiconductor field effect transistor (MOSFET) technology platforms due to their low power operation and low integration overhead, as they require few steps to form.
Current prototype programmable resistive RAMs may be based on conventional planar bulk MOSFETs, where the resistive memory element is typically implemented as multiple layers above a contact hole in a vertical manner. Programmable resistive memory cells can be used as stand alone memory or as embedded memory within a CMOS logic technology to facilitate non-volatile data storage in applications such as automotive microcontrollers, field-programmable gate arrays, and communications ICs.
While memory cell size is a key figure of merit for stand alone memories, the capability of a simple and cost-efficient integration of the resistive memory cell on top of a CMOS logic technology is of great relevance. A disadvantage of the current approach is that the vertical fabrication of a programmable volume of the resistive memory material in between the metallization layers generates topological height differences in areas with resistive memories and areas without memories, where CMOS circuits are implemented.
In the case of a PC-RAM, the programmable volume is placed between a heater and a top electrode. These topological height differences are undesirable for fabrication of CMOS circuits with typically 6-9 metal layers. Moreover, the size of the programmable volume determines write speed and required current, as well as the magnitude of a reset current. For high performance and low power operation, it is desirable to minimize the programmable volume with desirable write speeds and current requirements.